MiXiN wrote:To set the bias, should that be done with the MOSFET out of circuit - and if so, how is it done?
On FET PAs I usually set the bias voltage (Vgs) to minimum before I install the FET, then install it and ramp the voltage up until I get the minimum recommended quiescent drain current (Idq). This should be done with no RF drive. I can't really tell what's going on from your pictures but it looks like he might be trying to derive a fixed Vgs from somewhere, which isn't the best way of doing it, and isn't consistent with his statement that it will work with an RD06 or an RD15 (despite the fact that the two devices are similar in some respects). I did find a version of this board adapted for a FET which has a small pot controlling the Vgs and it looks like the voltage into that comes from somewhere close to the emitter of the BD139 but I wouldn't swear to it.
https://www.moutoulos.com/eshop/img/p/1 ... efault.jpg
MiXiN wrote:I'm going to substitute the RD15HVF1 for a RD06HVF1 per chance the drive is insufficient for the 15W MOSFET.
I wasn't trying to say that the drive was insufficient for the RD15 - I was trying to say that the drain current resulting from driving an RD15 to 15W would be too much for your chokes. Your VK200 solution is probably the way to go here, but it will depend on you getting the rest of the circuit (bias, matching, drive) right first - you might find you can't actually develop enough drive from the preceding stages to achieve 15W with the RD15 although I'm pretty sure that the original Dutch circuit wouldn't have been far off. By the way, it looks like you have three of those green chokes sourcing the current to the FET, not just the two which are burning.
MiXiN wrote:Here's an underside view of the PCB, and I'm pointing out the BD139 with a trimmer tool. The Collector is the middle pin. Not sure if this is controlling the gate bias of the final as this is a bit too technical for me.
What he used to do with the bipolar PA was feed the collector from the BD139 emitter via a couple of chokes with suitable decoupling. It looks like they're doing this to the driver stage on your board - better than feeding the PA FET (especially with an RD15). What I can't see is how he's biasing the FET.
Try to work out the circuit or get one from the guy. If you can't do this for whatever reason and can't see what he's doing to bias the FET - I think I'd probably disable the VCO or remove a coupling capacitor from one of the early stages and remove the FET. Then check the DC voltage on the gate pad (Vgs) and see if that power level pot changes this voltage. If yes, minimise it and ramp up when you've reinstalled the FET, until you get the correct Idq. If not, what is the Vgs? The RD15 datasheet implies that for the optimum minimum Idq (about 0.5A) the Vgs will be about 2.4V. You certainly don't need much more than this here to begin with. You can measure Idq by lifting one of those melting chokes and putting an ammeter in series in the gap, or get a rough idea by measuring the current drawn from the supply. Make sure the FET is on a good heatsink. Once happy with the bias, I'd change the chokes, reapply the drive and see how much welly I can get out. Then the real fun starts - or it may just be possible that your smokin' chokes are the problem.
Selassie-i, Selassie-i, Galatasaray...
